1. Field of the Invention
The present invention relates to an error correction decoding apparatus and method, and more particularly, to a decoding apparatus and method which can improve decoding performance by adjusting elements of a parity check matrix when implementing a low density parity code (LDPC) decoding algorithm.
2. Description of the Related Art
A low density parity code (LDPC) encoding method is an error correction coding technique used in wireless communications and optical recording and/or reproducing fields. LDPC encoding includes a process for generating parity information (additional information) by using a parity check matrix in which the same number of elements whose values are 1 are included in each row and column and the values of other elements whose values are 0. A detailed description of the LDPC encoding is disclosed in an article entitled, “Good Error Correction Codes Based on Very Sparse Matrices” by D. J. MacKay, IEEE Trans. on Information Theory, vol. 45, No. 2, pp. 399–431, 1999.
When element values of two elements positioned on the same row among a parity check matrix whose values are 1, and elements having element value of 1 are positioned on each column where the two elements are positioned, a cycle-4 status results. FIGS. 2A and 3A show an example of a parity check matrix where such a cycle-4 status occurs twice. As shown in FIGS. 2A and 3A, each of the four elements whose element values are indicated by ∘ and □, generate a cycle-4 status. In other words, in the cycle-4 status, four vertexes of a rectangle are formed by four elements having element value 1.
Generation of parity information using a parity check matrix where cycles exist may make decoding impossible or lower decoding performance.
A parity check matrix should satisfy two requirements: be linearly independent; and each predetermined number of elements whose values are 1 are included in each row and each column and the other elements whose values are 0. However, it is difficult to satisfy the two requirements and to remove cycles by generating a new parity check matrix or shifting locations of elements constituting a parity check matrix.